summaryrefslogtreecommitdiff
path: root/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
blob: d8db9ed4474dc0c94a6b0e51d1a5daef29d7b268 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (C) 2024 DeepComputing (HK) Limited
 */

/dts-v1/;
#include "jh7110-common.dtsi"

/ {
	model = "DeepComputing FML13V01";
	compatible = "deepcomputing,fml13v01", "starfive,jh7110";
};

&mmc0 {
	cap-mmc-highspeed;
	cap-mmc-hw-reset;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	vmmc-supply = <&vcc_3v3>;
	vqmmc-supply = <&emmc_vdd>;
};

&mmc0_pins {
	 rst-pins {
		pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
				      GPOEN_ENABLE,
				      GPI_NONE)>;
		bias-pull-up;
		drive-strength = <12>;
		input-disable;
		input-schmitt-disable;
		slew-rate = <0>;
	};
};

&mmc1 {
	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
	disable-wp;
};

&pcie1 {
	perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
	phys = <&pciephy1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pcie1_pins>;
	status = "okay";
};

&sysgpio {
	pcie1_pins: pcie1-0 {
		clkreq-pins {
			pinmux = <GPIOMUX(29, GPOUT_LOW,
					      GPOEN_DISABLE,
					      GPI_NONE)>;
			bias-pull-down;
			drive-strength = <2>;
			input-enable;
			input-schmitt-disable;
			slew-rate = <0>;
		};

		wake-pins {
			pinmux = <GPIOMUX(28, GPOUT_HIGH,
					      GPOEN_DISABLE,
					      GPI_NONE)>;
			bias-pull-up;
			drive-strength = <2>;
			input-enable;
			input-schmitt-disable;
			slew-rate = <0>;
		};
	};

	usb0_pins: usb0-0 {
		vbus-pins {
			pinmux = <GPIOMUX(25,  GPOUT_SYS_USB_DRIVE_VBUS,
					       GPOEN_ENABLE,
					       GPI_NONE)>;
			bias-disable;
			input-disable;
			input-schmitt-disable;
			slew-rate = <0>;
		};
	};
};

&usb0 {
	dr_mode = "host";
	pinctrl-names = "default";
	pinctrl-0 = <&usb0_pins>;
	status = "okay";
};

&usb_cdns3 {
	phys = <&usbphy0>, <&pciephy0>;
	phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
};