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6 daysMerge tag 'pci-v6.19-changes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Enable host bridge emulation for PCI_DOMAINS_GENERIC platforms (Dan Williams) - Switch vmd from custom domain number allocator to the common allocator to prevent a potential race with new non-VMD buses (Dan Williams) - Enable Precision Time Measurement (PTM) only if device advertises support for a relevant role, to prevent invalid PTM Requests that cause ACS violations that are reported as AER Uncorrectable Non-Fatal errors (Mika Westerberg) Resource management: - Prevent resource tree corruption when BAR resize fails (Ilpo Järvinen) - Restore BARs to the original size if a BAR resize fails (Ilpo Järvinen) - Remove BAR release from BAR resize attempts by the xe, i915, and amdgpu drivers so the PCI core can restore BARs if the resize fails (Ilpo Järvinen) - Move Resizable BAR code to rebar.c (Ilpo Järvinen) - Add pci_rebar_size_supported() and use it in i915 and xe (Ilpo Järvinen) - Add pci_rebar_get_max_size() and use it in xe and amdgpu (Ilpo Järvinen) Power management and error handling: - For drivers using PCI legacy suspend, save config state at suspend so that state (not any earlier state from enumeration, probe, or error recovery) will be restored when resuming (Lukas Wunner) - For devices with no driver or a driver that lacks power management, save config state at hibernate so that state (not any earlier state from enumeration, probe, or error recovery) will be restored when resuming (Lukas Wunner) - Save device config space on device addition, before driver binding, so error recovery works more reliably (Lukas Wunner) - Drop pci_save_state() from several drivers that no longer need it since the PCI core always does it and pci_restore_state() no longer invalidates the saved state (Lukas Wunner) - Document use of pci_save_state() by drivers to capture the state they want restored during error recovery (Lukas Wunner) Power control: - Add a struct pci_ops.assert_perst() function pointer to assert/deassert PCIe PERST# and implement it for the qcom driver (Krishna Chaitanya Chundru) - Add DT binding and pwrctrl driver for the Toshiba TC9563 PCIe switch, which must be held in reset after poweron so the pwrctrl driver can configure the switch via I2C before bringing up the links (Krishna Chaitanya Chundru) Endpoint framework: - Convert the endpoint doorbell test to use a threaded IRQ to fix a 'sleeping while atomic' issue (Bhanu Seshu Kumar Valluri) - Add endpoint VNTB MSI doorbell support to reduce latency between host and endpoint (Frank Li) New native PCIe controller drivers: - Add CIX Sky1 host controller DT binding and driver (Hans Zhang) - Add NXP S32G host controller DT binding and driver (Vincent Guittot) - Add Renesas RZ/G3S host controller DT binding and driver (Claudiu Beznea) - Add SpacemiT K1 host controller DT binding and driver (Alex Elder) Amlogic Meson PCIe controller driver: - Update DT binding to name DBI region 'dbi', not 'elbi', and update driver to support both (Manivannan Sadhasivam) Apple PCIe controller driver: - Move struct pci_host_bridge allocation from pci_host_common_init() to callers, which significantly simplifies pcie-apple (Marc Zyngier) Broadcom STB PCIe controller driver: - Disable advertising ASPM L0s support correctly (Jim Quinlan) - Add a panic/die handler to print diagnostic info in case PCIe caused an unrecoverable abort (Jim Quinlan) Cadence PCIe controller driver: - Add module support for Cadence platform host and endpoint controller driver (Manikandan K Pillai) - Split headers into 'legacy' (LGA) and 'high perf' (HPA) to prepare for new CIX Sky1 driver (Manikandan K Pillai) MediaTek PCIe controller driver: - Convert DT binding to YAML schema (Christian Marangi) - Add Airoha AN7583 DT compatible and driver support (Christian Marangi) Qualcomm PCIe controller driver: - Add Qualcomm Kaanapali to SM8550 DT binding (Qiang Yu) - Add required 'power-domains' and 'resets' to qcom sa8775p, sc7280, sc8280xp, sm8150, sm8250, sm8350, sm8450, sm8550, x1e80100 DT schemas (Krzysztof Kozlowski) - Look up OPP using both frequency and data rate (not just frequency) so RPMh votes can account for both (Krishna Chaitanya Chundru) Rockchip DesignWare PCIe controller driver: - Add Rockchip RK3528 compatible strings in DT binding (Yao Zi) STMicroelectronics STM32MP25 PCIe controller driver: - Fix a race between link training and endpoint register initialization (Christian Bruel) - Align endpoint allocations to match the ATU requirements (Christian Bruel) Synopsys DesignWare PCIe controller driver: - Clear L1 PM Substate Capability 'Supported' bits unless glue driver says it's supported, which prevents users from enabling non-working L1SS. Currently only qcom and tegra194 support L1SS (Bjorn Helgaas) - Remove now-superfluous L1SS disable code from tegra194 (Bjorn Helgaas) - Configure L1SS support in dw-rockchip when DT says 'supports-clkreq' (Shawn Lin) TI Keystone PCIe controller driver: - Fail the probe instead of silently succeeding if ks_pcie_of_data didn't specify Root Complex or Endpoint mode (Siddharth Vadapalli) - Make keystone buildable as a loadable module, except on ARM32 where hook_fault_code() is __init (Siddharth Vadapalli)" * tag 'pci-v6.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (100 commits) MAINTAINERS: Add Manivannan Sadhasivam as PCI/pwrctrl maintainer MAINTAINERS: Add CIX Sky1 PCIe controller driver maintainer PCI: sky1: Add PCIe host support for CIX Sky1 dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings PCI: cadence: Add support for High Perf Architecture (HPA) controller MAINTAINERS: Add NXP S32G PCIe controller driver maintainer PCI: s32g: Add NXP S32G PCIe controller driver (RC) PCI: dwc: Add register and bitfield definitions dt-bindings: PCI: s32g: Add NXP S32G PCIe controller PCI: Add Renesas RZ/G3S host controller driver PCI: host-generic: Move bridge allocation outside of pci_host_common_init() dt-bindings: PCI: Add Renesas RZ/G3S PCIe controller binding PCI: Validate pci_rebar_size_supported() input Documentation: PCI: Amend error recovery doc with pci_save_state() rules treewide: Drop pci_save_state() after pci_restore_state() PCI/ERR: Ensure error recoverability at all times PCI/PM: Stop needlessly clearing state_saved on enumeration and thaw PCI/PM: Reinstate clearing state_saved in legacy and !PM codepaths PCI: dw-rockchip: Configure L1SS support PCI: tegra194: Remove unnecessary L1SS disable code ...
2025-11-18Merge tag 'drm-intel-gt-next-2025-11-14' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: Fixes/improvements/new stuff: - Avoid lock inversion when pinning to GGTT on CHV/BXT+VTD (Janusz Krzysztofik) - Use standard API for seqcount read in TLB invalidation [gt] (Andi Shyti) Miscellaneous: - Wait longer for threads in migrate selftest on CHV/BXT+VTD (Janusz Krzysztofik) - Wait for page_sizes_gtt in gtt selftest on CHV/BXT+VTD (Janusz Krzysztofik) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Tvrtko Ursulin <tursulin@igalia.com> Link: https://patch.msgid.link/aRdXOAKlTVX_b0en@linux
2025-11-14drm/i915/gt: Use pci_rebar_size_supported()Ilpo Järvinen
PCI core provides pci_rebar_size_supported() that helps in checking if an encoded BAR Size is supported for the BAR or not. Use it in i915_resize_lmem_bar() to simplify code. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20251113180053.27944-7-ilpo.jarvinen@linux.intel.com
2025-11-14drm/i915: Remove driver side BAR release before resizeIlpo Järvinen
PCI core handles releasing device's resources and their rollback in case of failure of a BAR resizing operation. Releasing resource prior to calling pci_resize_resource() prevents PCI core from restoring the BARs as they were. Remove driver-side release of BARs from the i915 driver. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patch.msgid.link/20251113162628.5946-10-ilpo.jarvinen@linux.intel.com
2025-11-14PCI: Fix restoring BARs on BAR resize rollback pathIlpo Järvinen
BAR resize operation is implemented in the pci_resize_resource() and pbus_reassign_bridge_resources() functions. pci_resize_resource() can be called either from __resource_resize_store() from sysfs or directly by the driver for the Endpoint Device. The pci_resize_resource() requires that caller has released the device resources that share the bridge window with the BAR to be resized as otherwise the bridge window is pinned in place and cannot be changed. pbus_reassign_bridge_resources() rolls back resources if the resize operation fails, but rollback is performed only for the bridge windows. Because releasing the device resources are done by the caller of the BAR resize interface, these functions performing the BAR resize do not have access to the device resources as they were before the resize. pbus_reassign_bridge_resources() could try __pci_bridge_assign_resources() after rolling back the bridge windows as they were, however, it will not guarantee the resource are assigned due to differences in how FW and the kernel assign the resources (alignment of the start address and tail). To perform rollback robustly, the BAR resize interface has to be altered to also release the device resources that share the bridge window with the BAR to be resized. Also, remove restoring from the entries failed list as saved list should now contain both the bridge windows and device resources so the extra restore is duplicated work. Some drivers (currently only amdgpu) want to prevent releasing some resources. Add exclude_bars param to pci_resize_resource() and make amdgpu pass its register BAR (BAR 2 or 5), which should never be released during resize operation. Normally 64-bit prefetchable resources do not share a bridge window with the 32-bit only register BAR, but there are various fallbacks in the resource assignment logic which may make the resources share the bridge window in rare cases. This change (together with the driver side changes) is to counter the resource releases that had to be done to prevent resource tree corruption in the ("PCI: Release assigned resource before restoring them") change. As such, it likely restores functionality in cases where device resources were released to avoid resource tree conflicts which appeared to be "working" when such conflicts were not correctly detected by the kernel. Reported-by: Simon Richter <Simon.Richter@hogyros.de> Link: https://lore.kernel.org/linux-pci/f9a8c975-f5d3-4dd2-988e-4371a1433a60@hogyros.de/ Reported-by: Alex Bennée <alex.bennee@linaro.org> Link: https://lore.kernel.org/linux-pci/874irqop6b.fsf@draig.linaro.org/ Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [bhelgaas: squash amdgpu BAR selection from https://lore.kernel.org/r/20251114103053.13778-1-ilpo.jarvinen@linux.intel.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> # AVA, AMD GPU Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patch.msgid.link/20251113162628.5946-7-ilpo.jarvinen@linux.intel.com
2025-11-07Merge tag 'drm-misc-next-2025-11-05-1' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v6.19-rc1: UAPI Changes: - Add userptr support to ivpu. - Add IOCTL's for resource and telemetry data in amdxdna. Core Changes: - Improve some atomic state checking handling. - drm/client updates. - Use forward declarations instead of including drm_print.h - RUse allocation flags in ttm_pool/device_init and allow specifying max useful pool size and propagate ENOSPC. - Updates and fixes to scheduler and bridge code. - Add support for quirking DisplayID checksum errors. Driver Changes: - Assorted cleanups and fixes in rcar-du, accel/ivpu, panel/nv3052cf, sti, imxm, accel/qaic, accel/amdxdna, imagination, tidss, sti, panthor, vkms. - Add Samsung S6E3FC2X01 DDIC/AMS641RW, Synaptics TDDI series DSI, TL121BVMS07-00 (IL79900A) panels. - Add mali MediaTek MT8196 SoC gpu support. - Add etnaviv GC8000 Nano Ultra VIP r6205 support. - Document powervr ge7800 support in the devicetree. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/5afae707-c9aa-4a47-b726-5e1f1aa7a106@linux.intel.com
2025-11-07Merge tag 'drm-intel-next-2025-11-04' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull for v6.19: Features and functionality: - Enable LNL+ content adaptive sharpness filter (CASF) (Nemesa) - Use optimized VRR guardband (Ankit, Ville) - Enable Xe3p LT PHY (Suraj) - Enable FBC support for Xe3p_LPD display (Sai Teja, Vinod) - Specify DMC firmware for display version 30.02 (Dnyaneshwar) - Report reason for disabling PSR to debugfs (Michał) - Extend i915_display_info with Type-C port details (Khaled) - Log DSI send packet sequence errors and contents Refactoring and cleanups: - Refactoring to prepare for VRR guardband optimization (Ankit) - Abstract VRR live status wait (Ankit) - Refactor VRR and DSB timing to handle Set Context Latency explicitly (Ankit) - Helpers for prefill latency calculations (Ville) - Refactor SKL+ watermark latency setup (Ville) - VRR refactoring and cleanups (Ville) - SKL+ universal plane cleanups (Ville) - Decouple CDCLK from state->modeset refactor (Ville) - Refactor VLV/CHV clock functions (Jani) - Refactor fbdev handling (Jani) - Call i915 and xe runtime PM from display via function pointers (Jouni) - IRQ code refactoring (Jani) - Drop display dependency on i915 feature check macros (Jani) - Refactor and unify i915 and xe stolen memory interfaces towards display (Jani) - Switch to driver agnostic drm to display pointer chase (Jani) - Use display version over graphics version in display code (Matt A) - GVT cleanups (Jonathan, Andi) - Rename a VLV clock function to unify (Michał) - Explicitly sanitize DMC package header num entries (Luca) - Remove redundant port clock check from ALPM (Jouni) - Use sysfs_emit() instead of sprintf() in PMU sysfs (Madhur Kumar) - Clean up C20 PHY PLL register macros (Imre, Mika)) - Abstract "address in MMIO table" helper for general use (Matt A) - Improve VRR platform abstractions (Ville) - Move towards more standard PCI PM code usage (Ville) - Framebuffer refactoring (Ville) - Drop display dependency on i915_utils.h (Jani) - Include cleanups (Jani) Fixes: - Workaround docking station DSC issues with high pixel clock and bpp (Imre) - Fix Panel Replay in DSC mode (Imre) - Disable tracepoints for PREEMPT_RT as a workaround (Maarten) - Fix intel_crtc_get_vblank_counter() on PREEMPT_RT (Maarten) - Fix C10 PHY identification on PTL/WCL (Dnyaneshwar) - Take AS SDP into account with optimized guardband (Jouni) - Fix panic structure allocation memory leak (Jani) - Adjust an FBC workaround platforms (Vinod) - Add fallback for CDCLK selection (Naladala) - Avoid using invalid transcoder in MST transport select (Suraj) - Don't use cursor size reduction on display version 14+ (Nemesa) - Fix C20 PHY PLL register programming (Imre, Mika) - Fix PSR frontbuffer flush handling (Jouni) - Store ALPM parameters in crtc state (Jouni) - Defeature DRRS on LNL+ (Ville) - Fix the scope of the large DRAM DIMM workaround (Ville) - Fix PICA vs. AUX power ordering issue (Gustavo) - Fix pixel rate for computing watermark line time (Ville) - Fix framebuffer set_tiling vs. addfb race (Ville) - DMC event handler fixes (Ville) DRM Core: - CRTC sharpness strength property (Nemesa) - DPCD DSC quirk for Synaptics Panamera devices (Imre) - Helpers to query the branch DSC max throughput/line-width (Imre) Merges: - Backmerge drm-next for v6.18-rc and to sync with drm-xe-next (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/ec5a05f2df6d597a62033ee2d57225cce707b320@intel.com
2025-10-31Merge tag 'drm-intel-gt-next-2025-10-29' of ↵Simona Vetter
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: Fixes/improvements/new stuff: - Set O_LARGEFILE in __create_shmem() (Taotao Chen) - Fix incorrect error handling in shmem_pwrite() (Taotao Chen) - Skip GuC communication warning on reset in progress [guc] (Zhanjun Dong) - Fix conversion between clock ticks and nanoseconds [guc] (Umesh Nerlige Ramappa) Miscellaneous: - Avoid accessing uninitialized context in emit_rpcs_query() [selftests] (Krzysztof Karas) - Fix typo in comment (I915_EXEC_NO_RELOC) [gem] (Marlon Henrique Sanches) Backmerges: - Merge drm/drm-next into drm-intel-gt-next (Joonas Lahtinen) Signed-off-by: Simona Vetter <simona.vetter@ffwll.ch> From: Tvrtko Ursulin <tursulin@igalia.com> Link: https://patch.msgid.link/aQH994lQI_iVPzTI@linux
2025-10-31drm/i915: split out separate files for jiffies timeout and wait helpersJani Nikula
Add i915_jiffies.h and intel_display_jiffies.h for jiffies timeout and wait helpers, and use them separately from i915 and display. This helps reduce the display dependency on i915_utils.h. Long term, both msecs_to_jiffies_timeout() and wait_remaining_ms_from_jiffies() really belong in core kernel headers, but for now unblock display refactoring. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/d8bc62b3a81afa05c849dde9b0f633572eaf5611.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/gt: Use standard API for seqcount read in TLB invalidationAndi Shyti
seqprop_sequence() is not intended for use outside seqlock.h. Although it is accessible as a macro, it is meant to be used only internally within the header. Replace it with its proper wrapper, raw_read_seqcount(). Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Co-developed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@linux.intel.com> Cc: Christoph Lameter (Ampere) <cl@gentwo.org> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Link: https://lore.kernel.org/r/20251023132802.654061-1-andi.shyti@linux.intel.com
2025-10-31drm/i915: Wait longer for threads in migrate selftest on CHV/BXT+VTDJanusz Krzysztofik
When running on a Cherryview, or on a Broxton with VTD enabled, pinning of a VMA to GGTT is now committed asynchronously to avoid lock inversion among reservation_ww and cpu_hotplug locks, the latter acquired from stop_machine(). That may defer further processing of resources that depend on that VMA. As a consequence, a 10ms delay in a multithreaded migrate test case may occur too short and still incomplete threads may be interrupted, and the test case may fail with -ERESTARTSYS or -EINTR error code returned by any of those threads. Extend the delay to empirically determined 100ms on affected platforms. v3: Add an in-line comment that explains why 100ms (Andi). v2: Fix spelling (Sebastian, Krzysztof), - explain why VMA pinning is commited asynchronously on CHV/BXT+VTD (Krzysztof). Cc: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/20251023082925.351307-7-janusz.krzysztofik@linux.intel.com
2025-10-31drm: include drm_print.h where neededJani Nikula
There are a gazillion files that depend on drm_print.h being indirectly included via drm_buddy.h, drm_mm.h, or ttm/ttm_resource.h. In preparation for removing those includes, explicitly include drm_print.h where needed. Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/5fe67395907be33eb5199ea6d540e29fddee71c8.1761734313.git.jani.nikula@intel.com
2025-10-16drm/i915: Fix conversion between clock ticks and nanosecondsUmesh Nerlige Ramappa
When tick values are large, the multiplication by NSEC_PER_SEC is larger than 64 bits and results in bad conversions. The issue is seen in PMU busyness counters that look like they have wrapped around due to bad conversion. i915 PMU implementation returns monotonically increasing counters. If a count is lesser than previous one, it will only return the larger value until the smaller value catches up. The user will see this as zero delta between two measurements even though the engines are busy. Fix it by using mul_u64_u32_div() Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14955 Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://lore.kernel.org/r/20251016000350.1152382-2-umesh.nerlige.ramappa@intel.com
2025-10-16drm/i915: move and rename reg_in_range_tableMatt Atwood
reg_in_range_table is a useful function that is used in multiple places, and will be needed for WA_BB implementation later. Let's move this function and i915_range struct to its own file, as we are trying to move away from i915_utils files. v2: move functions to their own file v3: use correct naming convention Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://lore.kernel.org/r/20251009215210.41000-1-matthew.s.atwood@intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-13drm/i915/guc: Skip communication warning on reset in progressZhanjun Dong
GuC IRQ and tasklet handler receive just single G2H message, and let other messages to be received from next tasklet. During this chained tasklet process, if reset process started, communication will be disabled. Skip warning for this condition. Fixes: 65dd4ed0f4e1 ("drm/i915/guc: Don't receive all G2H messages in irq handler") Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15018 Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://lore.kernel.org/r/20250929152904.269776-1-zhanjun.dong@intel.com (cherry picked from commit 604b5ee4a653a70979ce689dbd6a5d942eb016bf) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-09drm/i915/guc: Skip communication warning on reset in progressZhanjun Dong
GuC IRQ and tasklet handler receive just single G2H message, and let other messages to be received from next tasklet. During this chained tasklet process, if reset process started, communication will be disabled. Skip warning for this condition. Fixes: 65dd4ed0f4e1 ("drm/i915/guc: Don't receive all G2H messages in irq handler") Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15018 Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com> Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://lore.kernel.org/r/20250929152904.269776-1-zhanjun.dong@intel.com
2025-09-29Merge drm/drm-next into drm-intel-nextJani Nikula
Backmerge to sync with drm/xe changes. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-19drm/i915/irq: rename irq_mask to gen2_imr_maskJani Nikula
Rename the struct drm_i915_private irq_mask member to gen2_imr_mask to reflect its usage more accurately. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/2c193663cd3ae524d8159b4216e45462017042fa.1758198300.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-19Merge tag 'drm-intel-next-2025-09-12' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Cross-subsystem Changes: - Overflow: add range_overflows and range_end_overflows (Jani) Core Changes: - Get rid of dev->struct_mutex (Luiz) Non-display related: - GVT: Remove redundant ternary operators (Liao) - Various i915_utils clean-ups (Jani) Display related: - Wait PSR idle before on dsb commit (Jouni) - Fix size for for_each_set_bit() in abox iteration (Jani) - Abstract figuring out encoder name (Jani) - Remove FBC modulo 4 restriction for ADL-P+ (Uma) - Panic: refactor framebuffer allocation (Jani) - Backlight luminance control improvements (Suraj, Aaron) - Add intel_display_device_present (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/aMxX_lBxm7wd5wmi@intel.com
2025-09-17drm/i915: split out vlv_clock.[ch]Jani Nikula
Move the VLV clock related functions to their own file. v2: Rebase Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> # v1 Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/0bc4a930f3e364c4fc37479f56bf07ccee854fcc.1757688216.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-17drm/i915: add vlv_clock_get_czclk()Jani Nikula
Add vlv_clock_get_czclk() helper to avoid looking at i915->czclk_freq directly. Reviewed-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/4885f6e486a31c773a3bfebd6936670234e57bd0.1757688216.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-17drm/i915: add vlv_clock_get_gpll()Jani Nikula
Add a vlv_clock_get_gpll() helper to hide the details from the callers. Reviewed-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/2589396fa14388d7709d2b01f1d32f9f38dab11a.1757688216.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-17drm/i915: do cck get/put inside vlv_get_cck_clock()Jani Nikula
Move towards VLV/CHV clock interfaces that handle sideband get/put inside them instead of at the caller. With this, we can switch to the simpler vlv_punit_get()/vlv_punit_put() in vlv_get_cdclk(). We'll need to move vlv_init_gpll_ref_freq() outside of the existing get/put in vlv_rps_init() and chv_rps_init(). Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/480b654b6c736a03343dfd17eb130c39fd82c637.1757688216.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-15Merge tag 'drm-intel-gt-next-2025-09-12' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: - Include the GuC registers in the error state (Daniele) - Use memdup_user() (Thorsten) - Selftest improvements (Jonathan) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://lore.kernel.org/r/aMPCfRObHMg6DZAs@jlahtine-mobl
2025-09-12drm/i915: split out i915_wait_util.hJani Nikula
Move waiting related utilities from i915_utils.h to separate new file i915_wait_util.h. Clean up related includes. Note: Many of the various wait macro usages could likely be refactored to use poll_timeout_us(). Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/431396ac8cdb3e2f4ff053a8933290289a66ce42.1757582214.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-12drm/i915: split out i915_list_util.hJani Nikula
Move list related utilities from i915_utils.h to separate new file i915_list_util.h. Clean up related includes. Note: Arguably none of this should exist in i915 in the first place. At least isolate it better. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/d7526809735194137116682f37cfa126a6a87ec9.1757582214.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-12drm/i915: split out i915_timer_util.[ch]Jani Nikula
Move timer related utilities from i915_utils.[ch] to separate new files i915_timer_util.[ch]. Clean up related includes. Note: Arguably none of this should exist in i915 in the first place. At least isolate it better. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/0a83d9489626121dcefcd4c1a05317399b5708f3.1757582214.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-12drm/i915: split out i915_ptr_util.hJani Nikula
Move pointer related utilities from i915_utils.h to a separate new i915_ptr_util.h header. Clean up related includes. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/3cd06aa2483e68f19401292e9d4c28bf2977fce5.1757582214.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-12Merge tag 'drm-intel-next-2025-09-05' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Cross-subsystem Changes: - iopoll: Generalize read_poll_timeout() into poll_timeout_us() (Ville) Non-display related: - PREEMPT_RT fix (Sebastian) - Replace DRM_DEBUG_SELFTEST with DRM_KUNIT_TEST (Ruben, Imre) - Some changes oeveral like in RPS, SoC, debugfs targeting display separation (Jani) Display related: - General refactor in favor of intel_display (Suraj) - Prune modes for YUV420 (Suraj) - Reject HBR3 in any eDP Panel (Ankit) - Change AUX DPCD probe address (Imre) - Display Wa fix, additions, and updates (Ankit, Vinod, Nemesa, Suraj, Jouni)) - DP: Fix 2.7 Gbps link training on g4x (Ville) - DP: Adjust the idle pattern handling (Ville) - DP: Shuffle the link training code a bit (Ville) - Don't set/read the DSI C clock divider on GLK (Ville) - Precompute plane SURF address/etc (Ville) - Enable_psr kernel parameter changes (Jouni) - PHY LFPS sending configuration fixes (Jouni) - Fix dma_fence_wait_timeout() return value handling (Aakash) - DP: Fix disabling training pattern (Imre) - Small code clean-ups (Gustavo, Colin, Jani, Juha-Pekka) - Change vblank log from err to debug (Suraj) - More display clean-up towards intel_display split (Jani) - Use the recomended min_hblank values (Arun) - Block hpd during suspend (Dibin) - DSI: Fix overflow issue in pclk parsing (Jouni) - PSR: Do not trigger Frame Change events from frontbuffer flush (Jouni) - VBT cleanups and new fields (Jani, Suraj) - Type-C enabled/disconnected dp-alt sink (Imre) - Optimize panel power-on wait time (Dibin) - Wildcat Lake enabling (Imre, Chaitanya) - DP HDR updates (Chaitanya) - Fix divide by 0 error in i9xx_set_backlight (Suraj) - Fixes for PSR (Jouni) - Remove the encoder check in hdcp enable (Suraj) - Control HDMI output bpc (Lee) - Fix possible overflow on tc power (Mika) - Convert code towards poll_timeout_* (Jani) - Use REG_BIT on FW_BLC_SELF_* macros (Luca) - ALPM LFPS and silence period calculation (Jouni) - Remove power state verification before HW readout (Imre) - Fix HPD mtp_tc_hpd_enable_detection (Ville) - DRAM detection (Ville) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/aLtc-gk3jhwcWxZh@intel.com
2025-09-11drm/i915/guc: Include the GuC registers in the error stateDaniele Ceraolo Spurio
If GuC hangs, the GuC logs might not contain enough information to understand exactly why the hang occurred. In this case, we need to look at the GuC HW state to try to understand where the GuC is stuck. It is therefore useful to include the GuC HW state in the error capture. The list of registers that are part of the GuC HW state can change based on platform, but it is the same for all platforms from TGL to MTL so we only need to support one version for i915. v2: revised list v3: remove confusing comment, use sizeof(u32) instead of 4 (John) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: John Harrison <John.C.Harrison@Intel.com> Link: https://lore.kernel.org/r/20250909223621.3782625-2-daniele.ceraolospurio@intel.com
2025-09-10Merge drm/drm-next into drm-intel-nextRodrigo Vivi
Catching up with some display dependencies. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915/gt: Fix memory leak in hangcheck selftestJonathan Cavitt
In active_engines, if intel_context_create fails, we need to go backwards through all the created contexts to free/put them. However, the way this is currently performed skips the first created context, as if count == 1, then --count returns 0 and exits the while-loop prematurely without performing the intel_context_put on context 0. Fix this by post-decrementing count in the while-loop, rather than pre-decrementing it. This change makes the prior guard against count underflowing unnecessary, as the while-loop exits when count == 0. Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Krzysztof Karas <krzysztof.karas@intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/20250904193041.12888-2-jonathan.cavitt@intel.com
2025-09-09drm/i915/gem: Clean-up outdated struct_mutex commentsLuiz Otavio Mello
The struct_mutex will be removed from the DRM subsystem, as it was a legacy BKL that was only used by i915 driver. After review, it was concluded that its usage was no longer necessary This patch updates various comments in the i915/gem and i915/gt codebase to either remove or clarify references to struct_mutex, in order to prevent future misunderstandings. * i915_gem_execbuffer.c: Replace reference to struct_mutex with vm->mutex, as noted in the eb_reserve() function, which states that vm->mutex handles deadlocks. * i915_gem_object.c: Change struct_mutex by drm_i915_gem_object->vma.lock. i915_gem_object_unbind() in i915_gem.c states that this lock is who actually protects the unbind. * i915_gem_shrinker.c: The correct lock is actually i915->mm.obj, as already documented in its declaration. * i915_gem_wait.c: The existing comment already mentioned that struct_mutex was no longer necessary. Updated to refer to a generic global lock instead. * intel_reset_types.h: Cleaned up the comment text. Updated to refer to a generic global lock instead. Signed-off-by: Luiz Otavio Mello <luiz.mello@estudante.ufscar.br> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250908131518.36625-6-luiz.mello@estudante.ufscar.br Acked-by: Tvrtko Ursulin <tursulin@ursulin.net> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915: Replace struct_mutex in intel_guc_logLuiz Otavio Mello
Remove the use of struct_mutex from intel_guc_log.c and replace it with a dedicated lock, guc_lock, defined within the intel_guc_log struct.      The struct_mutex was previously used to protect concurrent access and modification of intel_guc_log->level in intel_guc_log_set_level(). However, it was suggested that the lock should reside within the intel_guc_log struct itself.      Initialize the new guc_lock in intel_guc_log_init_early(), alongside the existing relay.lock. The lock is initialized using drmm_mutex_init(), which also ensures it is properly destroyed when the driver is unloaded. Signed-off-by: Luiz Otavio Mello <luiz.mello@estudante.ufscar.br> Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250908131518.36625-5-luiz.mello@estudante.ufscar.br Acked-by: Tvrtko Ursulin <tursulin@ursulin.net> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915: Change mutex initialization in intel_guc_logLuiz Otavio Mello
The intel_guc_log->relay.lock is currently initialized in intel_guc_log_init_early(), but it lacks a corresponding destructor, which can lead to a memory leak. This patch replaces the use of mutex_init() with drmm_mutex_init(), which ensures the lock is properly destroyed when the driver is unloaded. Signed-off-by: Luiz Otavio Mello <luiz.mello@estudante.ufscar.br> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250908131518.36625-4-luiz.mello@estudante.ufscar.br Acked-by: Tvrtko Ursulin <tursulin@ursulin.net> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915: Move struct_mutex to drm_i915_privateLuiz Otavio Mello
Move legacy BKL struct_mutex from drm_device to drm_i915_private, which is the last remaining user. Signed-off-by: Luiz Otavio Mello <luiz.mello@estudante.ufscar.br> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250908131518.36625-2-luiz.mello@estudante.ufscar.br Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-08drm/i915: rename range_overflows_end() to range_end_overflows()Jani Nikula
Rename range_overflows_end() to range_end_overflows(), along with the _t variant. It's all rather subjective, but I think range_end_overflows() reads better. Cc: Kees Cook <kees@kernel.org> Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org> Cc: linux-hardening@vger.kernel.org Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250829174601.2163064-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-02Merge tag 'drm-intel-gt-next-2025-09-01' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: - Apply multiple JSL/EHL/Gen7/Gen6 workaround properly at context level (Sebastian) - Protect against overflow in active_engine() (Krzysztof) - Use try_cmpxchg64() in __active_lookup() (Uros) - Enable GuC CT_DEAD output in regular debug builds (John) - Static checker and style fixes (Sebastian) - Selftest improvements (Krzysztof) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://lore.kernel.org/r/aLWZoEZVlBj2d8J9@jlahtine-mobl
2025-08-19drm/i915/rps: use intel_fsb_freq() and intel_mem_freq()Jani Nikula
The rps init only happens once, so it's not important to use the cached versions, and we can drop the dependency on them. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/6f3b703f7cb5605bf139cbe27697c1d4ffe7e719.1755511595.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-08-19drm/i915/dram: add intel_fsb_freq() and use itJani Nikula
Add a more generic intel_fsb_freq() function instead of platform specific ones. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/c5b77311c5f64b7163c86a042b7d023c07a685e2.1755511595.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-08-18drm/i915/gt: Relocate Gen6 context-specific workaroundSebastian Brzezinka
CACHE_MODE_0 register should be saved and restored as part of the context, not during engine reset. Move the related workaround (RC_OP_FLUSH_ENABLE) from rcs_engine_wa_init() to gen6_ctx_workarounds_init() for Gen6 platforms. This ensures the WA is applied during context initialisation. CM0_STC_EVICT_DISABLE_LRA_SNB is also Gen6-specific, but it does not stick when applied in context, so it remains in engine init. BSPEC: 11322 Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/f493bab389e51b2faf7c9a439724e9ea9ca04053.1754902406.git.sebastian.brzezinka@intel.com
2025-08-18drm/i915/gt: Relocate Gen7 context-specific workaroundsSebastian Brzezinka
CACHE_MODE_1 and CACHE_MODE_0 register should be saved and restored as part of the context, not during engine reset. Move the related workarounds (RC_OP_FLUSH_ENABLE, PIXEL_SUBSPAN_COLLECT_OPT_DISABLE) from rcs_engine_wa_init() to gen7_ctx_workarounds_init() for Gen7 platforms. This ensures the WA is applied during context initialisation. BSPEC: 11322, 11323 Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/06cf152803ab0050e09c521ac2fc3637549860b3.1754902406.git.sebastian.brzezinka@intel.com
2025-08-18drm/i915/gt: Relocate compression repacking WA for JSL/EHLSebastian Brzezinka
CACHE_MODE_0 registers should be saved and restored as part of the context, not during engine reset. Move the related workaround (Disable Repacking for Compression) from rcs_engine_wa_init() to icl_ctx_workarounds_init() for Jasper Lake and Elkhart Lake platforms. This ensures the WA is applied during context initialisation. BSPEC: 11322 Fixes: 0ddae025ab6c ("drm/i915: Disable compression tricks on JSL") Closes: Fixes: 0ddae025ab6c ("drm/i915: Disable compression tricks on JSL") Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Cc: stable@vger.kernel.org # v6.13+ Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/4feaa24094e019e000ceb6011d8cd419b0361b3f.1754902406.git.sebastian.brzezinka@intel.com
2025-08-09drm/i915/gt: Protect against overflow in active_engine()Krzysztof Karas
It is unlikely, but possible for the first call to intel_context_create() to fail with -ENOMEM, which would result in entering the following code block and decrementing "count", when it is set to 0 (initial condition in the for loop). Protect from overflowing the variable by checking for 0 value of "count" before entering the loop. Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/pogr74jktdqehrfap4tjky23ees4x7erh5dwgg5jb2n522cfkw@kpnxe4qzx4pj
2025-08-07drm/i915: use drm->debugfs_root for creating debugfs filesJani Nikula
Since commit 0b30d57acafc ("drm/debugfs: rework debugfs directory creation v5") we should be using drm->debugfs_root instead of minor->debugfs_root for creating debugfs files. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/ba8a2a7ec10e54b4d0a96926ef20c96e268c0b94.1753782998.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-08-03Merge tag 'mm-nonmm-stable-2025-08-03-12-47' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull non-MM updates from Andrew Morton: "Significant patch series in this pull request: - "squashfs: Remove page->mapping references" (Matthew Wilcox) gets us closer to being able to remove page->mapping - "relayfs: misc changes" (Jason Xing) does some maintenance and minor feature addition work in relayfs - "kdump: crashkernel reservation from CMA" (Jiri Bohac) switches us from static preallocation of the kdump crashkernel's working memory over to dynamic allocation. So the difficulty of a-priori estimation of the second kernel's needs is removed and the first kernel obtains extra memory - "generalize panic_print's dump function to be used by other kernel parts" (Feng Tang) implements some consolidation and rationalization of the various ways in which a failing kernel splats information at the operator * tag 'mm-nonmm-stable-2025-08-03-12-47' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (80 commits) tools/getdelays: add backward compatibility for taskstats version kho: add test for kexec handover delaytop: enhance error logging and add PSI feature description samples: Kconfig: fix spelling mistake "instancess" -> "instances" fat: fix too many log in fat_chain_add() scripts/spelling.txt: add notifer||notifier to spelling.txt xen/xenbus: fix typo "notifer" net: mvneta: fix typo "notifer" drm/xe: fix typo "notifer" cxl: mce: fix typo "notifer" KVM: x86: fix typo "notifer" MAINTAINERS: add maintainers for delaytop ucount: use atomic_long_try_cmpxchg() in atomic_long_inc_below() ucount: fix atomic_long_inc_below() argument type kexec: enable CMA based contiguous allocation stackdepot: make max number of pools boot-time configurable lib/xxhash: remove unused functions init/Kconfig: restore CONFIG_BROKEN help text lib/raid6: update recov_rvv.c zero page usage docs: update docs after introducing delaytop ...
2025-07-09relayfs: abolish prev_paddingJason Xing
Patch series "relayfs: misc changes", v5. The series mostly focuses on the error counters which helps every user debug their own kernel module. This patch (of 5): prev_padding represents the unused space of certain subbuffer. If the content of a call of relay_write() exceeds the limit of the remainder of this subbuffer, it will skip storing in the rest space and record the start point as buf->prev_padding in relay_switch_subbuf(). Since the buf is a per-cpu big buffer, the point of prev_padding as a global value for the whole buffer instead of a single subbuffer (whose padding info is stored in buf->padding[]) seems meaningless from the real use cases, so we don't bother to record it any more. Link: https://lkml.kernel.org/r/20250612061201.34272-1-kerneljasonxing@gmail.com Link: https://lkml.kernel.org/r/20250612061201.34272-2-kerneljasonxing@gmail.com Signed-off-by: Jason Xing <kernelxing@tencent.com> Reviewed-by: Yushan Zhou <katrinzhou@tencent.com> Reviewed-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Cc: Jens Axboe <axboe@kernel.dk> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-07-04Merge tag 'drm-intel-gt-next-2025-07-02' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next Driver Changes: Fixes/improvements/new stuff: - Avoid GuC scheduling stalls [guc] (Julia Filipchuk) - Remove force_probe requirement for DG1 (Ville Syrjälä) - Handle errors correctly to avoid losing GuC-2-Host messages [guc] (Jesus Narvaez) - Avoid double wakeref put if GuC context deregister failed [guc] (Jesus Narvaez) - Avoid timeline memory leak with signals and legacy platforms [ringbuf] (Janusz Krzysztofik) - Fix MEI (discrete) interrupt handler on RT kernels [gsc] (Junxiao Chang) Miscellaneous: - Allow larger memory allocation [selftest] (Mikolaj Wasiak) - Use provided dma_fence_is_chain (Tvrtko Ursulin) - Fix build error with GCOV and AutoFDO enabled [pmu] (Tzung-Bi Shih) - Fix build error some more (Arnd Bergmann) - Reduce stack usage in igt_vma_pin1() (Arnd Bergmann) - Move out engine related macros from i915_drv.h (Krzysztof Karas) - Move GEM_QUIRK_PIN_SWIZZLED_PAGES to i915_gem.h (Krzysztof Karas) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Tvrtko Ursulin <tursulin@igalia.com> Link: https://lore.kernel.org/r/aGTjUBeOQFw26bRT@linux
2025-07-03drm/i915/guc: Enable CT_DEAD output in regular debug buildsJohn Harrison
There is a sporadic failure to enable CTs ocurring in CI on one specific machine that can't be reproduced locally. The driver already supports dumping out a whole bunch of GuC related debug info on such a failure but only when the verbose GuC debug config option is enabled. It would be preferable to not enable all the verbose debug output. So just bump the CT_DEAD code to regular I915 debug level rather than GUC debug level, at least temporarily for CI. To prevent excessive spam in other parts of CI, also add a check against doing a CT_DEAD dump during an error injection test. No point in dumping large amounts of 'why did this fail' info when the fail is deliberately induced. v2: Revert accidentally enabling some other verbose debug output. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://lore.kernel.org/r/20250614030222.105601-1-John.C.Harrison@Intel.com
2025-07-01drm/i915/gsc: mei interrupt top half should be in irq disabled contextJunxiao Chang
MEI GSC interrupt comes from i915. It has top half and bottom half. Top half is called from i915 interrupt handler. It should be in irq disabled context. With RT kernel, by default i915 IRQ handler is in threaded IRQ. MEI GSC top half might be in threaded IRQ context. generic_handle_irq_safe API could be called from either IRQ or process context, it disables local IRQ then calls MEI GSC interrupt top half. This change fixes A380/A770 GPU boot hang issue with RT kernel. Fixes: 1e3dc1d8622b ("drm/i915/gsc: add gsc as a mei auxiliary device") Tested-by: Furong Zhou <furong.zhou@intel.com> Suggested-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Junxiao Chang <junxiao.chang@intel.com> Link: https://lore.kernel.org/r/20250425151108.643649-1-junxiao.chang@intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (cherry picked from commit dccf655f69002d496a527ba441b4f008aa5bebbf) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>